HP E1340A User's Manual
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The Operation
Status Group
The Operation Status Group monitors current operating conditions within
the AFG. The specific conditions include:
CALibrating, SWEeping, and
execution of the
INITiate:IMMediate command.
The Condition Register Calibration, sweeping, and the INITiate:IMMediate command are monitored
with the following bits in the Condition Register. All other bits are unused.
1514131211109876543210
unused
INIT unused SWE unused CAL
CALibrating: Bit 0 is set (1) during the execution of the CALibration:ALL?
query. The bit is cleared (0) otherwise.
SWEeping: Bit 3 is set (1) while a frequency sweep is in progress. The bit
is cleared (0) when waveform generation is halted and frequency sweeping
is not selected.
INITiated: Bit 8 is set (1) when the INITiate:IMMediate command is
executed. Waveform generation begins immediate if
ARM:STARt:SOURce
IMMediate
is set; otherwise waveform generation begins when the AFG
receives the first start arm. The bit is cleared (0) when waveform generation
is complete after the waveform is aborted (by an
ABORt, or *RST
command, or a Device Clear). The AFG then returns to the Idle state.
Reading the Condition Register
Bit settings in the Condition Register can be determined with the command:
STATus:OPERation:CONDition?
Bits 0, 3, and 8 have corresponding decimal values of 1, 8, and 256.
Reading the Condition Register does not affect the bit settings. The bits are
cleared following a reset (
*RST).
The Transition Filter The Transition Filter specifies which type of bit transition in the Condition
Register will set corresponding bits in the Event Register. Transition Filter
bits may be set for positive transitions (0 to 1), or negative transitions (1 to
0). The commands used to set the transitions are:
STATus:OPERation:NTRansition <unmask>
STATus:OPERation:PTRansition <
unmask>
NTRansition
sets the negative transition. For each bit unmasked, a 1 to 0
transition of that bit in the Condition Register sets the associated bit in the
Event Register.
PTRansition sets the positive transition. For each bit unmasked, a 0 to 1
transition of that bit in the Condition Register sets the associated bit in the
Event Register.
205 HP E1340A AFG Status Chapter 8