HP 13255 Technical Information
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13255
General
Purpose
Asvnchronous
Data
Comm
Modul~
13255-91089/17
Fev
AUG-Ot-16
3.3
3.3.1
3.3.2
3.4
3.4.1
CONTRnL
REGISTER.
T~e
control
register
Is
a
7-bit
latch
that
contains
the
control
state
of
the
peA.
The
control
hits
set
the
parity,
baud
rate,
and
RS232C
control
siqnals.
" -
rhe
r~qtster
Is
composed
of
seven
D-type
flip-flops.
Data
is
latched
in
this
reqister
from
the
data
bus.
The
reqister·s
output
controls
the
R5232C
control
lines
and
programs
the
U~RT
and
baud
rate
oenerator.
When
latched
in
the
control
register,
BUS1, BUS2,
and
BUS3
program
the
baud
rate
qen~rator
receive
multiplexer.
BtJS4
and
RUSS,
in
conjunction
with
the
234
and
2SB
switches,
control
the
PI,
SBS,
WLS2,
WLS1,
and
EPE
siqnal
Input.s
to
thf»
tJAPT.
BAUO
RATE
GENfRATnR.
The
baud
rate
generator
provides
the
timing
for
data
receotion
and
con-
trol.
It
consists
of
two
p~rts--a
standard
bAUd
rate
generator
and
a
custom
baud
rate
qenerator.
The
standard
baud
rate
generator
is
composed
of
three
4-bit
binarY
counters
(U31,
U26,
and
U36)
and
associated
presettinq
loaic.
The
standard
baud
rates
are
deriv~d
by
dividing
the
bus
Svste~
Clock
to
a
rate
of
16
times
the
desired
baud
rate.
The
standard
baud
rates
are:
110
baud
(1.16
kHz),
150
baud
(2.4
kHz),
300
baud
(4.8
kHz),
2200
baud
(19.2
kHz),
2400
baud
(38.4
k~z),
4~00
baud
(76.8
kHz),
and
9600
baud
(153.6
kHZ)!
The
counter
preset
function
is
only
used
when
110
or
134.5
baud
Is
selected.