CADENCE DESIGN SYSTEMS CADENCE SPACE-BASED ROUTER Datasheet

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DATASHEET
Signoff to manufacturing
Cadence Space-Based Router
45/65nm block and chip assembly routing system
Advanced
manufacturing
constraints
Cadence Chip Optimizer
Electrical optimization Yield optimization
Virtuoso custom
design platform
Third-party custom design
implementation
Encounter digital IC
design platform
Third-party custom design
implementation
OpenAccess
LEF/DEF
Design and
electrical
constraints
As designers integrate more and more digital and analog/mixed-
signal content into single chips, they face critical effects on yield and
manufacturability, such as growing lithography issues, inconsistent
manufacturing rules, copper materials, electrical concerns,
and performance requirements. Cadence
®
Space-Based Router
addresses all of these concerns simultaneously, helping designers
achieve shorter time to convergence, better quality of silicon, and
differentiated products for consumer and wireless markets.
Figure 1: Cadence Space-Based Router’s architecture incorporates electrical and manufacturing constraints to
achieve optimal quality of results for mixed-signal and high-performance designs
CADENCE SPACE-BASED
ROUTER
CADENCE ROUTING
TECHNOLOGY
The physical implementation process—
including routing—is what can make
or break your yield and manufacturing
objectives. Shapes on the layout not equal
to the shapes on the silicon means costly
silicon re-spins. To compensate, designers
rely on resolution enhancement techniques
and density management techniques. They
also employ overly conservative rules which
result in a die area penalty.
Cadence Space-Based Router has the
capacity and flexibility to help you manage
these complex issues simultaneously,
greatly reducing mask re-spin costs. Its
unique routing architecture is based
on a patented space-based approach
that meets the manufacturing,
lithography, materials, and performance
requirements of high-end digital and
analog/mixed-signal designs. The router
works seamlessly within both the
Virtuoso
®
custom design and Encounter
®
digital design platforms for maximum
productivity and quality of silicon.